Intel introduces 800W Rialto Bridge next-gen data center GPU with up to 160 Xe-Cores

Published: 31st May 2022, 16:53 GMT   Comments

Intel Rialto Bridge features 160 Xe-Cores, sampling starts in 2023

Today at ISC 2022 in Germany, Intel has unveiled its plans for a next-gen data center GPU accelerator.

Ponte Vecchio, which is set to launch by the end of this year, already has a successor codenamed Rialto Bridge. Today’s announcement is a confirmation of a rumor from March, where such a codename was first mentioned. This next-gen HPC accelerator, which is an evolution of Ponte Vecchio, will feature up to 160 Xe-Cores.

Intel claims that their new GPU will feature enhanced tiles with next process node, with increased density, performance, and efficiency. Intel did not confirm which node specifically does Rialto Bridge use, but one could guess it is Intel 4.

With 160 Xe-Cores, the core count has increased by 25% over Ponte Vecchio. Furthermore, Intel confirms Rialto will have increased I/O bandwidth and it most likely features HBM3 memory, which would be the second HPC GPU with this type of memory following NVIDIA Hopper.

Rialto Bridge is to feature OAM v2 form factor, which could support up to 800W. Interestingly, Intel promises that Rialto will be compatible with existing Ponte Vecchio subsystems.

Intel is targeting up to 30% increase for applications, but the company did not specify which applications would this performance target focus on. Such improvement is just 5% higher than Xe-Core count, so further improvements may be expected from a newer node and increased clock speed.

The company confirmed that Rialto Bridge will start sampling in mid-2023, but no date was provided. One might wonder if Intel will hit its targets this time, as Ponte Vecchio which was introduced more than 2 years ago, is still not available with Aurora 2 system.

2022-2023 HPC GPUs
VideoCardz.comNVIDIA H100 SXMAMD Instinct MI250X OAMIntel Ponte Vecchio OAMIntel Rialto Bridge OAM
Picture
GPUGH100Aldebaran (MCM)Ponte Vecchio (MCM)Rialto Bridge (MCM)
Transistors80B58.2B100BTBC
Die Size814 mm²2x ~790 mm²2x 640 mm²TBC
ArchitectureHopperCDNA2Xe-HPCXe-HPC
Fabrication NodeTSMC N4TSMC N6Intel 7, TSMC N5/N7Intel 4 (?)
GPU Clusters132 (SMs)220 (CUs)128 Xe-Cores160 Xe-Cores
L2 Cache50MB32MB408 MBTBC
Tensor/Matrix Cores5282x 440128160
Memory Bus5120-bit8192-bit8192-bit8192-bit (?)
Memory Size80 GB HBM3128GB HBM2e128GB HBM2eHBM3
TDP700W560W~600W~800W
Interface/Form FactorSXM5/PCIe Gen5OAM/PCIe Gen5OAM/PCIe Gen5OAM V2
Launch Year2022202120222023



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