Intel Arrow Lake-S appears in instruction set reference guide
Intel has just updated its “Architecture Instruction Set Extensions and Future Features” last month, which confirms what instructions will be supported by upcoming processors.
The guide confirms that both series will support a range of instructions, including AVX-VNNI-INT16, SHA512, SM3, and SM4 focusing on AI workloads and hashing functions.
The inclusion of AVX-VNNI in the Arrow Lake and Lunar Lake CPUs is particularly noteworthy. This instruction set extension enhances the performance of neural network inference workloads by providing a specialized capability for 8-bit and 16-bit integer operations. This means that applications utilizing artificial intelligence, machine learning, and deep learning algorithms can expect a boost in processing speed and efficiency.
The Arrow/Lunar Lake family also appears alongside Sierra Forest and Grand Ridge with support for Intel Linear Address Masking (LAM) instructions. It allows software to make use of untranslated address bits of 64-bit linear addresses for metadata.
Conveniently, to make the document more readable, Intel has highlighted the changes in purple:
Arrow Lake & Lunar Lake in Intel ISA, Source: Intel
Moreover, the support for SHA512, SM3, and SM4 instructions in these new CPU series means that Intel will improve security and encryption capabilities of next-gen client CPU series. The inclusion of SHA512, a widely used cryptographic hash function, allows for enhanced data integrity and secure data transmission. Additionally, the document lists support for the SM3 and SM4 cryptographic hash algorithms, used in communications.
Users can also find new hints of the upcoming Raptor Lake Refresh series. The company has added new CPUIDs for future Raptor Lake series, strongly confirming the company’s plans for an updated architecture for desktops and high-end laptops. The Refresh is now said to be part of the 14th Gen Core series deployment, which is to be offered alongside the Meteor Lake series.
Raptor Lake Refresh in Intel ISA, Source: Intel
Source: Intel (PDF)
