Corsair published DDR5 primer, teases high-speed modules coming soon
DDR5 memory is coming soon, Corsair publishes a blog post outlining the basics of new memory technology.
In the official blog, post Corsair teased high-capacity and high-speed DDR5 modules. The post covers the changes arriving with a new memory standard that will greatly improve the speed, power efficiency, and higher capacity with a single module.
While DDR5 technology is currently not supported by any platform, by the end of this year we should see Intel 12th Gen Core codenamed “Alder Lake-S” fully support the new standard. The pace of DDR5 adoption will heavily depend on the availability of DDR5-supported hardware, and probably even more importantly, on the price of new memory modules. Intel acknowledges that DDR5 may not be affordable at launch, hence it was decided to also add DDR4 support to Alder Lake-S processors. If motherboard vendors introduce a mix of DDR4 and DDR5, consumers will have a much better choice. This means that the cost of the upgrade to the latest platform will not be as significant as it would be should the user be required to change CPU, memory, and motherboard at the same time.
In its primer, Corsair mentions that DDR5 technology will double the bandwidth, while requiring less power (1.1 vs 1.2V). A much higher capacity of single memory modules going up to 128GB, which is four times as much as the current DDR4 standard, surely shouldn’t go unnoticed. This will also push the game developers to gradually take advantage of this large pool of memory buffer, Corsair believes.
According to JEDEC specifications, the fastest official memory speed for DDR5 is 6400 MT/s. This is of course not accounting factory-overclocked modules with their own XMP profiles. At this moment we only know that Alder Lake will support 4800 MT/s modules, but higher-speed support is to be expected with Alder Lake successors.
With DDR5, individual modules are split into two separate channels by design, allowing for shorter traces that contribute to less latency and higher speeds when it comes to communicating with individual memory ICs on a memory module. This also allows for what’s referred to as command/address mirroring since the signal from the CPU has to travel a shorter overall path to access specific banks of memory whereas in DDR4 a command/address signal had to travel through all banks of memory in a longer chain.
On DDR4, when a single bank of memory needed to be refreshed, the CPU had to wait for all banks of memory on a module to refresh before doing another read or write. With DDR5, we’ve got double the bank groups and when a bank needs to be refreshed only the same bank of each group is refreshed, allowing for the other memory bank groups to be accessed without the CPU having to wait.
Overall single access latency with DDR5 is relatively unchanged, while CAS Latency has increased, the overall latency of a top-tier DDR5 kit will be similar to previous generations of DRAM clocking in at 14-15ns thanks to the improvements we previously mentioned.
Reliability goes down as process technologies shrink, resulting in higher latency and looser timings overall at higher speeds. DDR5 features on-die ECC as part of its spec, helping to reduce errors and allow for memory ICs to operate at higher frequencies. To be clear, this doesn’t mean that mainstream DDR5 is using a full-fledged ECC implementation, there’ll still be unregistered modules for typical consumer applications and ECC modules for enterprise/research applications.