AMD Zen4 core in EPYC “Genoa” may support AVX-512 instructions

Published: Mar 1st 2021, 09:02 GMT   Comments

Please note that this post is tagged as a rumor.

AMD Zen4 Genoa with AVX-512

Zen4 with extended instructions.

In the last 48 hours, numerous details on AMD Zen4 in EPYC 7xx4 series codenamed “Genoa” have leaked. We have learned that the new server processors will be 96 core and support 12 channel DDR5 memory, but we also learned it will have PCI Gen5 support. The internal configuration of the chiplets has also been leaked.

AMD Genoa will require a new SP5 socket. This socket will support CPUs with the LGA6096 package measuring 72×75.4 mm, according to another leak from Patrick Schur. The package is not a perfect square, but not as rectangular as SP3-based EPYC processors. The new package will have a lot more room for future chiplet designs, with the first being 12 chiplets plus 1 I/O die. The first generation SP5 EPYC will be limited to 96 cores though, according to a leak from ExecutableFix.

Today a part of a new slide deck has allegedly leaked on Chiphell. The slide appears to list all features of the new Zen4 cores, confirming it would have more than 64 cores and support 2 threads per core. It was previously rumored that Genoa might have 4 threads per core, but that was quickly debunked. More importantly, though, the slide would suggest that Zen4 supports AVX3-512 and BFLOAT16 instructions. Both are extensively used in deep learning computations. The AVX 512 support on Intel CPUs and accelerators one of the key advantages over the AMD EPYC series. If this leak is true, then this is about to change.

ExecutableFix, who yesterday leaked the Zen4 details, has already confirmed that AVX3-512 support is indeed coming to the EPYC series.

AMD EPYC Genoa details, Source: Chiphell

AMD EPYC “Genoa” based on Zen4 core design is now expected to launch in 2022. AMD is yet to unveil its Zen3 based Milan series, a successor to Zen2 based Rome.

AMD EPYC Genoa mockup, Source: @ExecuFix

AMD EPYC Processor Series
7001 “Naples”7002 “Rome”7003 “Milan”7004 “Genoa”
Architecture14nm Zen7nm Zen27nm Zen35nm Zen4
SocketSP3 (LGA4094)SP3 (LGA4094)SP3 (LGA4094)SP5 (LGA-6096)
4x CCD
8x CCD + 1x I/0
8x CCD + 1x I/O
12x CCD + 1x I/O
Max Cores
Max Clock
3.8 GHz
3.9 GHz
4.1 GHz
Memory Support
8ch DDR4-2666 ECC
8ch DDR4-3200 ECC
8ch DDR4-3200 EEC
12ch DDR5-5200 ECC
PCIe Lanes
128x Gen3
128x Gen4
128x Gen4
128x Gen5

Source: Chiphell

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