AMD SP5 socket has been confirmed
It didn’t take long for the rumors about AMD’s next-gen SP6 socket to already find a confirmation through newly leaked photos.
Over at AnandTech forums one can find photos and schematics for the socket codenamed SP6. This socket has been explained in leaked slides as a platform for edge and telco systems, therefore, where power optimizations are just as crucial as performance. According to those slides, this socket would support up to 32-core Genoa (Zen4) EPYC processors and up to 64-core Bergamo (Zen4c) series. The power would also be limited to 225W, which is nearly half of what the full SP5 socket can support.
AMD SP6 (LGA4844), Source: SteinFG
The SP6 socket looks more or less the same as the SP3 socket for the current Milan series. In fact, the size is identical (58.5 x 75.4 mm), however the SP6 has a different LGA package with 4844 contact pins. That’s a significant reduction from 6096 for the SP5 socket.
- Socket SP3 – LGA 4094 -58.5 x 75.4 mm
- Socket SP5 – LGA 6096 – 76.0 x 80.0 mm
- Socket SP6 – LGA 4844 -58.5 x 75.4 mm
It goes without saying, but SP6, SP5 and SP3 processors will not be compatible with each other. This also means that AMD has to make two different EPYC Genoa/Turin series for each socket.
This document defines the requirements for a 4844-position, 0.94 mm × 0.81 mm interstitial pitch, surface-mount land-grid array (SM-LGA) socket—herein referred to as the Socket SP6—for use with the AMD 4844-position organic land grid array (OLGA) package that has substrate dimensions of 58.5 mm × 75.4 mm. The Socket SP6, shown in Figure 1, is designed to provide a reliable electrical interconnect between the printed circuit board (PCB) and the 4844 land pads of the OLGA package throughout the life of the product.
— SteinFG, AnandTech Forums
AMD SP6 (LGA4844), Source: SteinFG
One of our readers made a suggestion that 4th Gen EPYC series could now be divided into high-performance 7004 series and efficiency-focused EPYC 5004 CPUs, which makes a lot of sense. Furthermore, the latter option could open more possibilities for AMD to engage the consumer HEDT market.
RUMORED AMD EPYC Processor Series Specifications | ||||
---|---|---|---|---|
VideoCardz | 3rd Gen EPYC “Milan / Milan-X (*)” | 4th Gen EPYC “Genoa / Genoa-X (*)” | 4th Gen EPYC “Bergamo” | 5th Gen EPYC “Turin” |
Launch | 2021 | 2022 | 2022 | 2023/2024 |
Architecture | 7nm Zen3 | 5nm Zen4 | 5nm Zen4c | Zen5 |
Socket | SP3 (LGA4094) | SP5 (LGA-6096) SP6 (LGA-4844) | SP5 (LGA-6096) SP6 (LGA-4844) | SP5 (LGA-6096) SP6 (LGA-4844) |
Modules/Chiplets | 8xCCD + 1xIOD | 12xCCD + 1xIOD | TBC | TBC |
Max Cores | 64C / 128T | 96C / 192T | 128C / 256T | 256C / 512T |
L2 Cache Per Core | 0.5 MB | 1 MB | TBC | TBC |
L3 Cache Per CCX | 32 MB / 96 MB (*) | 32 MB / ?? MB (*) | TBC | TBC |
Memory Channels | 8-channel | 12-channel (SP5) 6-channel (SP6) | 12-channel (SP5) 6-channel (SP6) | 12-channel (SP5) 6-channel (SP6) |
Memory Support | DDR4-3200 | DDR5-5200 | DDR5-5200 | DDR5-6000 |
PCIe Lanes | 128x Gen4 | 160x Gen5 (SP5) 96x Gen5 (SP6) | 160x Gen5 (SP5) 96x Gen5 (SP6) | TBC |
Max cTDP | 280W | 200-400W (SP5) 70-225W (SP6) | 200-400W (SP5) 70-225W (SP6) | TBC |
Source: AnandTech Forums via @Olrak29_