AMD Radeon Instinct MI100 with 32GB HBM2 and Arcturus GPU spotted

Published: Feb 10th 2020, 08:50 GMT   Comments

Please note that this post is tagged as a rumor.

Today TechPowerUP confirmed that they have the first BIOS in their database for a yet unreleased Radeon MI100 from the Instinct series.

AMD Radeon MI100 with 32GB HBM2

The speculation on Arcturus GPU dates back to the middle of last year. From the very beginning, it was obvious that the GPU is clearly not made for gaming. It is more than likely a new product for AMD’s Instinct series, which is competing against NVIDIA’s Tesla accelerators.

The MI100 is believed to be a 32GB graphics card featuring HBM2 memory, TPU confirms it supports both Samsung (KHA884901X) and Hynix memory (H5VR64ESA8H). The clock speed of the memory is expected at 1000 MHz.

Based on the ID string (MI100 D34303 A1 XL 200W 32GB 1000m), the card is designed to be a 200W product. which is considerably lower than MI50 and MI60 series based on Vega 20.

The Arcturus GPU in MI100 is set to operate in various frequencies: 1334 MHz (GPU), 1000 MHz (Memory), 1091 MHz (SOC), TPU claims. The 1334 MHz might be a base clock, based on a very simple calculation. The “100” in MI100 product name refers to INT8 computing power, as it did for the Vega series. This means that to reach 100 TOPs it has to be at least 1500 MHz and have 8192 shaders — or any other combination (like 7680 shaders and 1650 MHz clock). It is quite clear that the XL in the name refers to a cut-down chip, so the core count might be lower and the boost clock must be higher.

Lastly, the Instinct MI100 is likely not based on the exact same Big Navi we expect in Radeon RX series. It is either a completely new silicon or its special variant with certain parts disabled for accelerated computing.

Radeon Instinct
GPU7nm Arcturus XL7nm Vega 207nm Vega 20
7680-8192 (TBC)
Max INT8 Compute
~100 TOPs
59 TOPs
54 TOPs
Base Clock
~1334 MHz
1200 MHz
1200 MHz
Boost Clock
~1500-1650 MHz (TBC)
1800 MHz
Memory Clock
1000 MHz
1000 MHz
1000 MHz
Memory Bus


Source: TechPowerUP (original source requested their name to be removed).

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