Looks like we have new data on Navi 2X graphics processors.
AMD Navi 21 – 80 CUs, Navi 22 – 40 CUs, Navi 23 – 32 CUs
The speciations of the Navi 21 and Navi 22 were already ‘confirmed’ by AMD through ROCm 3.8 software update earlier. The data was pieced together by a Redditor stblr. It seems that the same user now has an update featuring Navi 23 and upcoming APUs.
The data provides the most basic speciations for upcoming GPUs and APUs such as Compute Unit count, boosts clocks, and power targets. The values were extracted from macOS 1 1 beta already containing the firmware for the ‘AMDRadeonX6000’ series.
Judging from the frequency listed in the data, we can guess that these correspond to the Radeon Pro series. For instance, the freq_table_gfx[1] (MHz) of Navi 10 is 1400 MHz, similar to Radeon Pro 5700 with a boost clock of 1350 MHz. As we know Radeon RX 5700 XT has a boost clock of 1755 MHz, so what this means it the clock speeds could be even higher. For Navi 23 and Navi 31, the frequencies and power limits are still missing.
AMD RDNA Graphics Processors | ||||||
---|---|---|---|---|---|---|
Navi 10 | Navi 14 | Navi 21 | Navi 22 | Navi 23 | Navi 31 | |
Compute Units | ||||||
GPU Clock | – | – | ||||
Power Limit | – | – |
Navi 21 – Sienna Cichlid – Big Navi
This GPU would allegedly feature up to 80 Compute Units (5120 Stream Processors if each CU has 64 cores). The variant listed in macOS11 appears to have a boost clock at 2050 MHz with Navi 21A variant and up to 2200 MHz with Navi 21B variant.
With a boost clock of 2200 MHz, the Navi 21B would have a shader performance of 22.5 TFLOPs. For comparison, with NVIDIA’s new dual SM architecture, the GeForce RTX 3080 graphics card has a maximum FP32 throughput of 29.8 TFLOPs.
Navi 22 – Navy Flounder
The mid-tier GPU in a lineup appears to feature 40 CUs, so just as many as Navi 10. Therefore, the GPU is expected to be an RDNA2 version of mid-range graphics for the upcoming RX 6700 series. The GPU is listed with a (maximum) GPU clock of 2500 MHz, so even higher than Navi 21.
Navi 23 – Dimgrey Cavefish
The entry-level GPU called Navi 23 is also listed in the firmware. Judging from the data collected by the Reddit stblr, we can conclude that the full number of CUs is 32 (so around 2048 Stream Processors). The frequency charts are not featured in the firmware yet.
Navi 31
The first RDNA3 GPU is also listed on the firmware. The GPU appears to feature the same CU count as Navi 21, meaning we are looking at a refresh under a new microarchitecture. Thus, the Navi 31 GPU would also feature 5120 Stream Processors. We are not yet sure what are AMD intentions with Navi 31, but one would guess it will end up in RX 7000 series and future Radeon Pro SKUs for Apple Mac.
The full GPU charts posted by stblr
[reprinted with permission]
AMD RDNA Discrete GPUs | |||||||
---|---|---|---|---|---|---|---|
Property | Navi 10 | Navi 14 | Navi 12 | Navi 21 | Navi 22 | Navi 23 | Navi 31 |
num_se | 2 | 1 | 2 | 4 | 2 | 2 | 4 |
num_cu_per_sh | 10 | 12 | 10 | 10 | 10 | 8 | 10 |
num_sh_per_se | 2 | 2 | 2 | 2 | 2 | 2 | 2 |
num_rb_per_se | 8 | 8 | 8 | 4 | 4 | 4 | 4 |
num_tccs | 16 | 8 | 16 | 16 | 12 | 8 | 16 |
num_gprs | 1024 | 1024 | 1024 | 1024 | 1024 | 1024 | 1024 |
num_max_gs_thds | 32 | 32 | 32 | 32 | 32 | 32 | 32 |
gs_table_depth | 32 | 32 | 32 | 32 | 32 | 32 | 32 |
gsprim_buff_depth | 1792 | 1792 | 1792 | 1792 | 1792 | 1792 | 1792 |
parameter_cache_depth | 1024 | 1024 | 1024 | 1024 | 1024 | 1024 | 1024 |
double_offchip_lds_buffer | 1 | 1 | 1 | 1 | 1 | 1 | 1 |
wave_size | 32 | 32 | 32 | 32 | 32 | 32 | 32 |
max_waves_per_simd | 20 | 20 | 20 | 16 | 16 | 16 | 16 |
max_scratch_slots_per_cu | 32 | 32 | 32 | 32 | 32 | 32 | 32 |
lds_size | 64 | 64 | 64 | 64 | 64 | 64 | 64 |
num_sc_per_sh | 1 | 1 | 1 | 1 | 1 | 1 | 1 |
num_packer_per_sc | 2 | 2 | 2 | 4 | 4 | 4 | 4 |
num_gl2a | N/A | N/A | N/A | 4 | 2 | 2 | 4 |
unknown0 | N/A | N/A | N/A | 10 | 10 | 8 | 10 |
unknown1 | N/A | N/A | N/A | 16 | 12 | 8 | 16 |
unknown2 | N/A | N/A | N/A | 80 | 40 | 32 | 80 |
num_cus (computed) | 40 | 24 | 40 | 80 | 40 | 32 | 80 |
AMD RDNA Discrete GPU Frequencies | ||||||
---|---|---|---|---|---|---|
Property | Navi 10 a | Navi 10 b | Navi 14 | Navi 21 a | Navi 21 b | Navi 22 |
gfxclk (MHz) | 300 – 1000 | 300 – 1000 | 300 – 1900 | 500 – 2050 | 500 – 2050 | 500 – 2500 |
uclk (MHz) | 100 – 750 | 100 – 750 | 100 – 875 | 577 – 1089 | 577 – 1089 | 577 – 1089 |
socket_power_limit_ac[0] (W) | 180 | 180 | 110 | 200 | 238 | 170 |
freq_table_gfx[0] (MHz) | 300 | 300 | 300 | 500 | 500 | 500 |
freq_table_gfx[1] (MHz) | 1400 | 1400 | 1900 | 2050 | 2200 | 2500 |
freq_table_uclk[0] (MHz) | 124 | 100 | 100 | 100 | 100 | 97 |
freq_table_uclk[1] (MHz) | 500 | 500 | 500 | 500 | 500 | 457 |
freq_table_uclk[2] (MHz) | 625 | 625 | 625 | 625 | 625 | 674 |
freq_table_uclk[3] (MHz) | 875 | 750 | 875 | 1000 | 1000 | 1000 |
AMD APUs
The leak also covers the specs of upcoming AMD APUs. The long-discussed Cezanne is the upcoming Zen3 based mobile architecture, featuring identical an idnetical core configuraiton to Renoir. The series is expected to feature up to 8 Compute Units of GCN (Vega) graphics and up to 8 CPU cores.
Meanwhile, Van Gogh will be the first architecture to feature RDNA2 graphics. It would retain the same number of CUs as Renoir and Cezanne – up to 8.
Things get a lot more interesting as we move to Rembrandt. According to leaked roadmaps, Rembrandt will be a successor to Cezanne. The series would rely on RDNA2 graphics and a new fabrication process (rumored to be 6nm). The chart only covers the GPU configuration of the architecture, but one would guess that a more efficient node and next-generation graphics will provide a substantial boost to AMD mobile offer.
AMD Rembrand is also rumored to feature a PCIe 4.0 interface, which is huge news for those waiting for high-end GPUs being offered alongside AMD Ryzen processors. The PCIe 3.0 x8 interface was a bottleneck that prevented notebooks makers from offering more powerful discrete graphics.
AMD GCN (Vega) and RDNA APUs | ||||
---|---|---|---|---|
Property | Renoir | Cezanne | Van Gogh | Rembrandt |
num_se | 1 | 1 | 1 | 1 |
num_cu_per_sh | 8 | 8 | 8 | 6 |
num_sh_per_se | 1 | 1 | 1 | 2 |
num_rb_per_se | 2 | 2 | 2 | 4 |
num_tccs | 4 | 4 | 4 | 4 |
num_gprs | 256 | 256 | 1024 | 1024 |
num_max_gs_thds | 32 | 32 | 32 | 32 |
gs_table_depth | 32 | 32 | 32 | 32 |
gsprim_buff_depth | 1792 | 1792 | 1792 | 1792 |
parameter_cache_depth | 1024 | 1024 | 512 | 256 |
double_offchip_lds_buffer | 1 | 1 | 1 | 1 |
wave_size | 64 | 64 | 32 | 32 |
max_waves_per_simd | 10 | 10 | 16 | 16 |
max_scratch_slots_per_cu | 32 | 32 | 32 | 32 |
lds_size | 64 | 64 | 64 | 64 |
num_sc_per_sh | N/A | 1 | 1 | 1 |
num_packer_per_sc | N/A | 2 | 2 | 4 |
num_gl2a | N/A | N/A | 4 | 4 |
unknown0 | N/A | N/A | 8 | 6 |
unknown1 | N/A | N/A | 4 | 4 |
unknown2 | N/A | N/A | 8 | 12 |
num_cus (computed) | 8 | 8 | 8 | 12 |
Leaked AMD CPU and APU Roadmaps, Source: @MebiuW
Source: stblr @ Reddit