Leaked roadmaps suggest AMD EPYC Zen4 Genoa and Zen5 Turin will support SP5 and new SP6 socket, Genoa-X also planned
AdoredTV leaked roadmaps for next-gen AMD EPYC series.
In a video posted on YouTube, the leaker shared two roadmaps for the EPYC 7004 and 7005 series. The slides posted mention a new type of socket called SP6. Assuming that the slides are legit, it would appear that SP6 socket would support fewer CXL lanes and 6-channel memory, whereas the SP5 would be for more powerful configurations.
Furthermore, the Zen4 for SP6 socket would be limited to 70-225W range and 32-core Zen4/64 core Zen4c configurations. Meanwhile, SP5 would support full 96-core Zen4 and 128-core Zen4c Genoa and Bergamo CPUs. The SP5 systems would operate in 200 to 400W range.
This is the first ‘leak’ on Genoa-X, which has been rumored before. The roadmap suggest that Genoa-X’s production would start in late Q3 2023, and it would act as a stop gap between Turin. Genoa-X would be a successor to Milan-X, which is AMD’s first data-center CPU architecture with innovative 3D V-Cache.
The SP6 socket is also listed for Genoa-X as a Density & Performance per Watt optimized platform. A single socket installations with fewer PCIe Gen5 and CXL lanes would power telecommunications and edge systems that do not require so much power.
|RUMORED AMD EPYC Processor Series Specifications|
7003 “Milan-X” (*)
7004 “Genoa-X” (*)
|7004 “Bergamo”||7005 “Turin”||7006 “Venice”|
|Architecture||7nm Zen3||5nm Zen4||5nm Zen4c||Zen5||Zen6|
|Socket||SP3 (LGA4094)||SP5 (LGA-6096)|
|Modules/Chiplets||8xCCD + 1xIOD||12xCCD + 1xIOD||12xCCD + 1xIOD||TBC||TBC|
|Max Cores||64C / 128T||96C / 192T||128C / 256T||256C / 512T||TBC|
|L2 Cache Per Core||0.5 MB||1 MB||TBC||TBC||TBC|
|L3 Cache Per CCX||32 MB / 96 MB (*)||32 MB / ?? MB (*)||TBC||TBC||TBC|
|Memory Channels||8-channel||12-channel (SP5)|
|PCIe Lanes||128x Gen4||160x Gen5 (SP5)|
96x Gen5 (SP6)
|160x Gen5 (SP5)|
96x Gen5 (SP6)
|Max cTDP||280W||200-400W (SP5)|