AMD showcases V-Cache packing technology on Ryzen 9 5900X CPU
At Computex, AMD revealed its latest innovation, which is 3D stacking technology for upcoming AMD Ryzen CPUs.
During the demo, AMD CEO Dr. Lisa Su has revealed a prototype AMD Ryzen 9 5900X processor with Zen3 core architecture featuring a DRAM stack on top of the compute tile. This stack is a 3D V-Cache offering an additional 64MB of Level3 cache (SRAM).
The 3D stacking technology allows server IPs to be placed on each other. In an example shown at Computex, prototype Ryzen CPU has a DRAM acting as a third-level cache. In combination with the existing L3 cache on each CCD, a dual-CCD Ryzen CPU such as 5950X could feature 192MB of total L3 cache. This hybrid bond V-Cache technology will improve interconnect density by 200 times and improve overall efficiency by 3X, AMD states.
AMD has even demonstrated the prototype Ryzen CPU in gaming. According to AMD, a 12-core Ryzen 5900X clocked at 4.0 GHz fixed frequency compared to a 12-core 5900X prototype with V-Cache is on average 15% faster in select titles.
AMD revealed that the first products featuring V-Cache are on track for production later this year. It is unclear if the first products with this stacking technology will be based on Zen3 or Zen4 architecture.
Accelerating Chiplet and Packaging Innovation
AMD continues to build on its leadership IP and investments in leading manufacturing and packaging technologies with AMD 3D chiplet technology, a packaging breakthrough that combines AMD’s innovative chiplet architecture with 3D stacking using an industry-leading hybrid bond approach that provides over 200 times the interconnect density of 2D chiplets and more than 15 times the density compared to existing 3D packaging solutions. Pioneered in close collaboration with TSMC, the industry-leading technology also consumes less energy than current 3D solutions and is the most flexible active-on-active silicon stacking technology in the world.
AMD showed the first application of 3D chiplet technology at COMPUTEX 2021 – a 3D vertical cache bonded to an AMD Ryzen™ 5000 Series processor prototype that is designed to deliver significant performance gains across a broad set of applications. AMD is on-track to begin production on future high-end computing products with 3D chiplets by the end of this year.
AMD 3D Chiplet Technology: A packaging breakthrough for high-performance computing.
— AMD (@AMD) June 1, 2021