AMD confirms EPYC Zen4 Genoa-X features over 1GB of L3 Cache, Zen5 Turin announced

Published: Jun 9th 2022, 21:29 GMT   Comments

AMD Genoa-X with 1GB+ cache

At 2022 Financial Analyst day AMD also confirmed its data-center CPU roadmap.

The family of AMD EPYC CPUs is growing. The 4th Gen series will not only feature Genoa and Bergamo silicons, but also Genoa-X and Siena. The full family will therefore include four different variants of Zen4 based processors.

AMD EPYC Series Roadmap, Source: AMD

Probably more important is the confirmation of 5th Gen EPYC series codenamed Turin. AMD is not mentioning which Zen5 sub-architecture specifically does Turin use, but it is very likely to be Zen5. Earlier today AMD announced Zen5, Zen5 V-Cache and Zen5c microarchitectures, all of which can make their way to EPYC 7005 series at some point in the future.

AMD EPYC 7004 Genoa-X & Siena Series, Source: AMD

A new product series announced today is “Siena” which is a new custom silicon designed specifically for the telecommunication market. This is most likely AMD’s new cost-effective architecture that was rumored for the new SP6 socket. It matches the 64-core configuration as listed in the leaked slides.

The Genoa-X is a variant of Zen4 Genoa from EPYC 7004 series. It will feature 3D V-Cache technology listed with over 1 GB of L3 cache. That’s a visible increase over EPYC Milan-X 768 MB cache. Genoa is designed for SP5 platform, and it will support DDR5 memory as well as PCIe Gen5 and CXL interfaces. AMD confirmed that Genoa-X will feature just as many cores as Genoa non-X, which is up to 96 of Zen4 cores.

Both Genoa-X and Siena are set to launch next year.

Source: AMD Financial Analyst Day 2022

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